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TargetReg

Description
Hard wired things related to registers. This is module is preventing the native code generator being able to emit code for non-host architectures. TODO: Do a better job of the overloading, and eliminate this module. We'd probably do better with a Register type class, and hook this to Instruction somehow. TODO: We should also make arch specific versions of RegAlloc.Graph.TrivColorable
Documentation
targetVirtualRegSqueeze :: RegClass -> VirtualReg -> FastInt
targetRealRegSqueeze :: RegClass -> RealReg -> FastInt
targetClassOfRealReg :: RealReg -> RegClass
targetMkVirtualReg :: Unique -> Size -> VirtualReg
targetWordSize :: Size
targetRegDotColor :: RealReg -> SDoc
targetClassOfReg :: Reg -> RegClass
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